ATSAMA5D41A-CU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

MFG CO.

ATSAMA5D41A-CU

SMART ARM-based Embedded MPU

Atmel Corporation 

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13.5.8 L2CC Event Counter 1 Configuration Register

Name:

L2CC_ECFGR1

Address: 0x00A00204

Access: Read/Write

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

–

ESRC

EIGEN

• EIGEN: Event Counter Interrupt Generation

Value Name

Description

0x0 INT_DIS

Disables (default)

0x1 INT_EN_INCR

Enables with Increment condition

0x2 INT_EN_OVER Enables with Overflow condition

0x3 INT_GEN_DIS

Disables Interrupt generation

• ESRC: Event Counter Source

Value Name

Description

0x0 CNT_DIS

Counter Disabled

0x1 SRC_CO

Source is CO

0x2 SRC_DRHIT

Source is DRHIT

0x3 SRC_DRREQ

Source is DRREQ

0x4 SRC_DWHIT

Source is DWHIT

0x5 SRC_DWREQ

Source is DWREQ

0x6 SRC_DWTREQ Source is DWTREQ

0x7 SRC_IRHIT

Source is IRHIT

0x8 SRC_IRREQ

Source is IRREQ

0x9 SRC_WA

Source is WA

0xa SRC_IPFALLOC Source is IPFALLOC

0xb SRC_EPFHIT

Source is EPFHIT

0xc SRC_EPFALLOC Source is EPFALLOC

0xd SRC_SRRCVD Source is SRRCVD

0xe SRC_SRCONF Source is SRCONF

0xf SRC_EPFRCVD Source is EPFRCVD

SAMA5D4 Series [DATASHEET]

99

Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16

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