CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
11.7.2 Gen Map 0–6 Upper Address (Memory)
Register Name: Gen Map 0–6 Upper Address (Memory)
I/O Index: 2Fh Extended Index: 05h–09h, 20h, 21h
Memory Offset: 840h, 841h, 842h, 843h, 844h, 845h, 846h
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Register Per: socket
Register Compatibility Type: ext.
Bit 2
Bit 1
Bit 0
Upper Address
R/W:00000000
These bits are used in comparing PCI Address bits 31:24 for each memory window (0–6). These bits are
used in conjunction with the Window Type Select, Gen Map 0–6 Start Address, and Gen 0–6 End
Address registers.
If the Window Type Select bit corresponding to windows 0–4 is reset, that window is a memory window
and this register specifies that window’s upper address.
If the Window Type Select bit for a window is set and the corresponding bit in the PCI Space Control
register is reset, then that window is a memory window on the PCI side. This register sets the upper
address for that memory window.
If none of the above conditions is true, then this register is ignored.
June 1998
ADVANCE DATA BOOK v0.3
EXTENSION REGISTERS
143
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