CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
11.8 Prefetch Window Register
Byte 3
(high)
Byte 2
(low)
Byte 1
(high)
Byte 0
(low)
Configuration Register Name: Prefetch Window Register
I/O Index: 2Fh Extended Index 1Ch
Offset: 91Ch
Bit 31
Bit 30
Bit 29
Bit 28
Bit 27
Bit 23
Bit 22
Bit 21
R/W:00000000
Bit 20
Bit 19
Bit 15
Bit 14
Bit 13
R/W:00000000
Bit 12
Bit 11
R/W:00000000
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
R/W:00000000
Register Per: Socket
Register Compatibility Type: ext.
Bit 26
Bit 25
Bit 24
Bit 18
Bit 17
Bit 16
Bit 10
Bit 9
Bit 8
Bit 2
Bit 1
Bit 0
This register is read-only in the current version of the CL-PD6833.
11.8.1 PCI Space Control
Register Name: PCI Space Control
I/O Index: 2Fh Extended Index: 22h
Memory Offset: 922h
Bit 7
Bit 6
Bit 5
Gen Map 6
PCI Type
R/W:1
Gen Map 5
PCI Type
R/W:1
Reserved
R/W:0
Register Per: socket
Register Compatibility Type: ext
Bit 4
Gen Map 4
PCI Type
R/W:0
Bit 3
Gen Map 3
PCI Type
R/W:0
Bit 2
Gen Map 2
PCI Type
R/W:0
Bit 1
Gen Map 1
PCI Type
R/W:0
Bit 0
Gen Map 0
PCI Type
R/W:0
Bits 7:6, 4:0 — Gen Map [6:0] PCI Type
0
General Map registers configured for PCI memory operation.
1
General Map registers configured for PCI I/O operation.
If the corresponding bit in the Window Type Select register is set and the PCI Space Control bit
is reset, then the programmed general map window responds to PCI memory operations. If the
PCI Space Control bit is set, then the programmed general map window responds to PCI I/O
operations. If the corresponding bit in the Window Type Select register is reset, this bit is ignored.
Bit 5 — Reserved
June 1998
ADVANCE DATA BOOK v0.3
EXTENSION REGISTERS
149
Share Link: 
