CMX850L8 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX850L8' PDF : 103 Pages View PDF
Communications Controller
CMX850
There is no status bit in RTCCON for the alarm interrupt signal, therefore should it be necessary to poll the
alarm interrupt it must be done from the flag bit in the interrupt control register ICON1B.
ALM0: SFR Address $F4
All bits unaffected by reset.
Bit:
7
6
5
4
3
2
1
0
Bits 7 - 0 of RTC ALM register
ALM1: SFR Address $F5
All bits unaffected by reset.
Bit:
7
6
5
4
3
2
1
0
Bits 15 - 8 of RTC ALM register
ALM2: SFR Address $F6
All bits unaffected by reset.
Bit:
7
6
5
4
3
2
1
0
Bits 23 - 16 of RTC ALM register
ALM3: SFR Address $F7
All bits unaffected by reset.
Bit:
7
6
5
4
3
2
1
0
Bits 31 - 24 of RTC ALM register
© 2003 CML Microsystems Plc
52
D/850/6
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