FDC37N869 View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
FDC37N869
SMSC -> Microchip
'FDC37N869' PDF : 147 Pages View PDF
PS/2 Model 30 Interface Mode
7
nDRV2
RESET
N/A
CONDITION
Table 8 - SRB PS/2 Model 30 Mode
6
5
4
3
nDS1 nDS0 WDATA F/F RDATA F/F
1
1
0
0
2
WGATE
F/F
0
1
nDS3
1
0
nDS2
1
nDRIVE SELECT 2, Bit 0
Active low status of the DS2 disk interface output.
nDRIVE SELECT 3, Bit 1
Active low status of the DS3 disk interface output.
Write Gate, Bit 2
Active high status of the latched WGATE output signal. This bit is latched by the active going edge of WGATE and is
cleared by the read of the DIR register.
Read Data, Bit 3
Active high status of the latched RDATA output signal. This bit is latched by the inactive going edge of RDATA and
is cleared by the read of the DIR register.
Write Data, Bit 4
Active high status of the latched WDATA output signal. This bit is latched by the inactive going edge of WDATA and
is cleared by the read of the DIR register. This bit is not gated with WGATE.
nDRIVE SELECT 0, Bit 5
Active low status of the DS0 disk interface output.
nDRIVE SELECT 1, Bit 6
Active low status of the DS1 disk interface output.
nDRV2, Bit 7
The nDRV2 bit is always “1”.
SMSC DS – FDC37N869
Page 22
Rev. 11/09/2000
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