FDC37N869 View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
FDC37N869
SMSC -> Microchip
'FDC37N869' PDF : 147 Pages View PDF
Low Power, Bit 6
A logic “1” written to this bit will put the floppy controller into Manual Low Power mode. The floppy controller clock
and data separator circuits will be turned off. The controller will come out of manual low power mode after a
software reset or following access to the Data Register or Main Status Register.
Software Reset, Bit 7
This active high bit has the same function as the DOR RESET (DOR bit 2) except that this bit is self clearing.
Table 18 - Precompensation Delays
PRECOMP
SELECT
PRECOMPENSATION DELAY
43 2
11 1
0.00 ns-DISABLED
00 1
41.67 ns
01 0
83.34 ns
01 1
125.00 ns
10 0
166.67 ns
10 1
208.33 ns
11 0
250.00 ns
00 0
Default (see Table 21)
SMSC DS – FDC37N869
Page 27
Rev. 11/09/2000
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