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FDC37N869 View Datasheet(PDF) - SMSC -> Microchip

Part Name
Description
MFG CO.
'FDC37N869' PDF : 147 Pages View PDF
Table 10 - Drive Activation Values
DRIVE
DOR VALUE
0
1CH
1
2DH
2
4EH
3
8FH
Table 11 - Internal 2 Drive Decode: Drives 0 and 1
DIGITAL OUTPUT REGISTER
DRIVE SELECT OUTPUTS
(ACTIVE LOW)
MOTOR ON OUTPUTS
(ACTIVE LOW)
Bit 7 Bit 6 Bit 5 Bit 4 Bit1 Bit 0
nDS1 nDS0
nMTR1
nMTR0
X
X
X
1
0
0
1
0
nBIT 5
nBIT 4
X
X
1
X
0
1
0
1
nBIT 5
nBIT 4
X
1
X
X
1
0
1
1
nBIT 5
nBIT 4
1
X
X
X
1
1
1
1
nBIT 5
nBIT 4
0
0
0
0
X
X
1
1
nBIT 5
nBIT 4
TAPE DRIVE REGISTER (TDR)
The Tape Drive register (Base Address + 3) is included for 82077 software compatibility and allows the user to
assign tape support to a particular drive during initialization. Any future reference to that drive automatically invokes
tape support. The Tape Select bits TDR.[1:0] determine the tape drive number. Table 12 illustrates the Tape Select
bit encoding. Note that drive 0 is the boot device and cannot be assigned tape support.
The encoding of the TDR depends on the Floppy mode (see section Floppy Modes on page 17). The TDR is
unaffected by a software reset.
Table 12 - Tape Select Bits
TAPE SEL1
(TDR.1)
TAPE SEL0
(TDR.0)
DRIVE
SELECTED
0
0
NONE
0
1
1
1
0
2
1
1
3
Normal Floppy Mode
In Normal mode the TDR contains only bits 0 and 1 (Table 13). During a read in Normal mode TDR bits 2 - 7 are
high impedance. The Tape Select Bits are Read/Write.
TDR
Table 13 - TDR Normal Floppy Mode
DB7
DB6
DB5
DB4
DB3
DB2
Tri-state Tri-state Tri-state Tri-state Tri-state Tri-state
DB1
Tape
Sel1
DB0
Tape
Sel0
SMSC DS – FDC37N869
Page 24
Rev. 11/09/2000
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