HT47C20L View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT47C20L' PDF : 55 Pages View PDF
The external interrupt request flag (EIF), real time clock
interrupt request flag (RTF), time base interrupt request
flag (TBF), enable external interrupt bit (EEI), enable
real time clock interrupt bit (ERTI), enable time base in-
terrupt bit (ETBI), and enable master interrupt bit (EMI)
constitute an interrupt control register 0 (INTC0) which
is located at 0BH in the data memory. The timer/event
counter interrupt request flag (TF), enable timer/event
counter interrupt bit (ETI) on the other hand, constitute
an interrupt control register 1 (INTC1) which is located
at 1EH in the data memory. EMI, EEI, ETI, ETBI, and
ERTI are used to control the enabling/disabling of inter-
rupts. These bits prevent the requested interrupt being
serviced. Once the interrupt request flags (RTF, TBF,
TF, EIF) are set, they remain in the INTC1 or INTC0 re-
spectively until the interrupts are serviced or cleared by
a software instruction.
It is recommended that a program does not use the
²CALL subroutine² within the interrupt subroutine. Inter-
rupts often occur in an unpredictable manner or need to
be serviced immediately in some applications. If only
one stack is left, and enabling the interrupt is not well
controlled, the original control sequence will be dam-
aged once the ²CALL subroutine² operates in the inter-
rupt subroutine.
Oscillator Configuration
The HT47C20L provides one 32768Hz crystal oscillator
for real time clock and system clock. The 32768Hz crys-
tal oscillator still work at halt mode. The halt mode stop
the system clock and T1 and ignores an external signal
to conserve power. The real time clock comes from
32768Hz crystal and still works at halt mode.
A 32768Hz crystal across OSC1 and OSC2 is needed
to provide the feedback and phase shift needed for the
oscillator, no other external components are needed.
32768H z
O SC1
fs
( s till w o r k s a t h a lt m o d e )
S y s te m c lo c k
( S to p s a t h a lt m o d e )
O SC2
T1
( s to p s a t h a lt m o d e )
C r y s ta l O s c illa to r
32768Hz Crystal
HT47C20L
Watchdog Timer - WDT
The clock source of the WDT (fS) is implemented by a
32768Hz crystal oscillator. The timer is designed to pre-
vent a software malfunction or sequence jumping to an
unknown location with unpredictable results. The
Watchdog Timer can be disabled by mask option. If the
Watchdog Timer is disabled, all the executions related to
the WDT result in no operation.
The ²HALT² instruction is executed, WDT still counts and
can wake-up from halt mode due to the WDT time-out.
The WDT overflow under normal operation will initialize
²chip reset² and set the status bit TO. Whereas in the halt
mode, the overflow will initialize a ²warm reset² only the
Program Counter and SP are reset to 0. To clear the con-
tents of WDT, three methods are adopted, external reset
(a low level to RES), software instruction, or a ²HALT² in-
struction. The software instructions are of two sets which
include ²CLR WDT² and the other set - ²CLR WDT1² and
²CLR WDT2². Of these two types of instruction, only one
can be active depending on the mask option - ²CLR WDT
times selection option². If the ²CLR WDT² is selected (i.e.,
CLR WDT times equal one), any execution of the ²CLR
WDT² instruction will clear the WDT. In case ²CLR WDT1²
and ²CLR WDT2² are chosen (i.e. ²CLR WDT² times equal
two), these two instructions must be executed to clear the
WDT; otherwise, the WDT may reset the chip because of
the time-out.
The WDT time-out period ranges from fS/215~fS/216. The
²CLR WDT² or ²CLR WDT1² and ²CLRWDT2² instruc-
tion only clear the last two-stage of the WDT.
Multi-function Timer
The HT47C20L provides a multi-function timer for the WDT,
time base and real time clock but with different time-out pe-
riods. The multi-function timer consists of a 7-stage di-
vider and an 8-bit prescaler, with the clock source
coming from the 32768Hz. The multi-function timer also
provides a fixed frequency signal (fS/8) for the LCD driver
circuits, and a selectable frequency signal (ranges from
fS/22 to fS/29) for buzzer output by mask option.
3 2 7 6 8 H z C ry s ta l O S C
fS
D iv id e r
fS /2 8
P r e s c a le r
W D T C le a r
Watchdog Timer
CK T
CK T
R
R
T im e - o u t R e s e t
fS /2 1 5 ~ fS /2 1 6
Rev. 2.30
12
December 2, 2005
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