HT47C20L
In the case of timer/event counter Off condition, writing
data to the timer/event counter preload register also re-
loads that data to the timer/ event counter. But if the
timer/event counter turns On, data written to the
timer/event counter preload register is kept only in the
timer/event counter preload register. The timer/event
counter will still operate until overflow occurs.
When the timer/event counter (reading TMRAH) is read,
the clock will be blocked to avoid errors. As this may re-
sults in a counting error, this must be taken into consid-
eration by the programmer.
It is strongly recommended to load first the desired
value into TMRBL, TMRBH, TMRAL, and TMRAH reg-
isters then turn on the related timer/event counter for
proper operation. Because the initial value of TMRBL,
TMRBH, TMRAL and TMRAH are unknown.
If the timer/event counter is on, the TMRAH, TMRAL,
TMRBH and TMRBL cannot be read or written to.
Only when the timer/event counter is off and when
the instruction ²MOV² is used could those four reg-
isters be read or written to.
Example for Timer/event counter mode (disable interrupt):
clr tmrc
clr adcr.1
; set timer mode
clr intc1.4
; clear timer/event counter interrupt request flag
mov a, low (65536-1000)
; give timer initial value
mov tmrbl, a
; count 1000 time and then overflow
mov a, high (65536-1000)
mov tmrbh, a
mov a, 00110000b
tmrc, a
; timer clock source=T1 and timer on
p10:
clr wdt
snz intcl.4
jmp p10
; polling timer/event counter interrupt request flag
clr intcl.4
; clear timer/event counter interrupt request flag
; program continue
Rev. 2.30
17
December 2, 2005