L6238 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6238' PDF : 35 Pages View PDF
L6238
masked out, and when it is low, the Bemf informa-
tion can be detected normally. When the motor
has reached a predetermined speed, the SE-
QUENCE INCREMENT pin can be left low and
the L6238 Motor Control logic will take over and
automatically bring the motor into Phase Lock.
3,0 START-UP ALGORITHMS
3.1 Spin-Up Operation
The spin operation can be separated into 3 parts:
1) Open Loop Start-Up - The object is to create
motion in the desired direction so that the Bemf
voltages at the 3 motor terminals can provide reli-
able information enabling a transition to closed
loop operation.
2) Closed Loop Start-Up - The Bemf voltage
zerocrossings provide timing information so that
the motor can be accelerated to steady state
speed.
3) Steady-State Operation - The Bemf voltage
zero-crossings provide timing information for pre-
cision speed control.
The L6238 contains features that offer flexible
control over the start-up procedure. Either the on-
Figure 9: Auto Start Profile
board Auto-Start Algorithm can be used to control
the start-up sequence or more sophisticated exte-
mal start-up algorithms can be developed using
the Serial Port and key control/sense functions
brought out to pins.
3.2 Auto-Start Algorithm
The Serial Port Control Bit Auto/Ext (Refer to Ta-
ble 2), controls the start-up mode. The power up
default state is a logic high which selects the
AutoStart Mode. When Run/Brake is low, the
L6238 is in brake mode, and the Auto-Start Algo-
rithm is reset. In the brake mode, all of the lower
DMOS drivers are ON, and the upper drivers are
OFF.
Note that Run/Brake should be brought low for a
period exceeding the value selected for the brake
delay time in order to initialize the brake delay cir-
cuit.
The Auto-Start Algorithm is based on an Align &
Go approach and can be visualized by referring to
Figure 9. Shown are the Output Enable and
Run/Brake control signals, sequencer output with
the resultant output phases, and the Align and Go
status bits. The times labeled Tl and T2 are two
Tasd <1>
0
0
1
1
Tasd <0>
0
1
0
1
Note: PLL Reference Frequency = 90Hz
12/35
Ta = T1
0.178 s
0.356 s
0.533 s
0.711 s
T2
0.533 s
1.067 s
1.600 s
2.133 s
Tg
0.711 s
1.422 s
2.133 s
2.844 s
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