L6238
torque. The spin sense waveform at the bottom of
the figure indicates that this output signal toggles
with each zero crossing.
5.2 Brake Delay
When Run/Brake is brought low, a brake is initi-
ated. Referring to figure 16, SWI is opened and
the brake delay capacitor, Cbrake, is allowed to
discharge towards ground via Rbrake. At the same
time, switches SW2 through SW7 bring the gates
of the output FETs to ground halting conduction,
causing the motor to coast. While the motor is
coasting, the Bemf is used to park the heads.
When Cbrake reaches a voltage that is below the
turn ON threshold of Q I, Switches SW8, 9 and 10
bring the gates of the lower drivers to Vbrake po-
tential. This enables the lower FETs causing a
braking action. This braking action also occurs if
the logic supply is lost. The analog supply is not
Figure 16: Brake Delay.
monitored in the L6238 since the L6243 already
monitors this voltage and initiates a Park function
when this supply drops to a predetermined level.
If multiple logic supplies are used in the applica-
tion, all logic signals to the L6238 including the
reference and clock signals should be buffered
with gates powered by the same supply as the
L6238 in order to prevent erroneous operation.
This would occur, for example, if the 5V supply to
the controller were lost while 5V were still present
at one of the logic pins. This would partially power
the chip, causing unpredictable operation.
5.3 Charge Pump
The charge pump circuitry is used as a means of
doubling the analog supply voltage in order to al-
low the upper N-channel DMOS transistors to be
driven like P-channel devices. The energy stored
in the reservoir capacitor is also used to drive the
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