L6238 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6238' PDF : 35 Pages View PDF
L6238
Figure 12: Coarse and Fine DAC’s.
3) Phase Lock - After a brief settling time, typi-
cally 1-2 seconds after spin-up, the counters will
alternately count up and down as required to
maintain the phase difference to be as close to
minimum as possible. The counter outputs at this
time should be ”hovering” around 10000000.
The outputs of the two DACs are sent to latches
that store the digital representation of the meas-
ured phase error. This information is then bussed
to the DACs.
4.3 Coarse/Fine DACs
Two DACs are used to convert the digital phase
error information into an analog voltage that can
Table 2
be used to command the output driver’s current.
In figure 12, the two 8-bit digital error signals are
used to switch in 256 possible voltages derived
from a precision Band-Gap reference. The same
resistor ladder string is used for the Coarse and
Fine DACs. The outputs of the DACS are then
sent to buffer stages and added together via a
summing amplifier.
4.4 Transfer Functions
Figure 13 represent the Output Voltage vs Phase
Error for the Coarse and Fine DACs depicting the
resolution that is achievable.
Table 2 shows examples of the resolution of both
Fsystem
Clock
8MHz
10MHz
12MHz
Fcoarse
15.6KHz
19.5KHz
23.4KHz
Phase LSB
Coarse
64.1µs
51.3µs
42.7µs
(Range)
Coarse
16.3ms
13.1ms
10.9ms
Ffine
1.0MHz
1.25MHz
1.5MHz
Phase LSB
Fine
1.0µs
800ns
667ns
(Range)
Fine
255µs
204µs
170µs
16/35
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