Qdatasheet_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

LRS1383 View Datasheet(PDF) - Sharp Electronics

Part Name
Description
MFG CO.
LRS1383
Sharp
Sharp Electronics Sharp
'LRS1383' PDF : 114 Pages View PDF
FUM00701
56
Table 17. Partition Configuration Register Definition
R
R
R
R
R
PC2
PC1
PC0
15
14
13
12
11
10
9
8
R
R
R
R
R
R
R
R
7
6
5
4
3
2
1
0
PCR.15-11 = RESERVED FOR FUTURE
111 = There are four partitions in this configuration.
ENHANCEMENTS (R)
Each plane corresponds to each partition respectively.
PCR.10-8 = PARTITION CONFIGURATION (PC2-0)
000 = No partitioning. Dual Work is not allowed.
001 = Plane1-3 are merged into one partition.
Dual work operation is available between any two
partitions.
PCR.7-0 = RESERVED FOR FUTURE
(default in a bottom parameter device)
ENHANCEMENTS (R)
010 = Plane 0-1 and Plane2-3 are merged into one
partition respectively.
100 = Plane 0-2 are merged into one partition.
(default in a top parameter device)
NOTES:
011 = Plane 2-3 are merged into one partition. There are 1. After power-up or device reset, PCR10-8 (PC2-0) is set to
three partitions in this configuration. Dual work operation "001" in a bottom parameter device and "100" in a top
is available between any two partitions.
parameter device.
110 = Plane 0-1 are merged into one partition. There are 2. See Figure 17 for the detail on partition configuration.
three partitions in this configuration. Dual work operation 3. PCR.15-11 and PCR.7-0 bits are reserved for future use.
is available between any two partitions.
101 = Plane 1-2 are merged into one partition. There are
If these bits are read via the Read Identifier Codes/OTP
command, the device may output "1" or "0" on these bits.
three partitions in this configuration. Dual work operation
is available between any two partitions.
Figure 17. Partition Configuration
Appendix to Spec No.: MFM2-J13207 Model No.: LRS1383 March 1, 2001
Rev. 2.20
Share Link: GO URL

All Rights Reserved © qdatasheet.com  [ Privacy Policy ] [ Contact Us ]