LTC4214 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC4214' PDF : 32 Pages View PDF
LTC4214-1/LTC4214-2
APPLICATIO S I FOR ATIO
Soft-Start
If the SS pin is not connected, this pin defaults to a linear
voltage ramp, from 0V to 1.6V in about 220µs at GATE
start-up, as shown in Figure 17a. If a soft-start capacitor,
CSS, is connected to this SS pin, the soft-start response is
modified from a linear ramp to an RC response (Equa-
tion␣ 6), as shown in Figure 17b. This feature allows load
current to slowly ramp-up at GATE start-up. Soft-start is
initiated at time point 3 by a TIMER transition from VTMRH
to VTMRL (time points 1 to 2) or by the OV pin falling below
the VOVHI – VOVHST threshold after an OV condition. When
the SS pin is below 0.2V, the analog current limit amplifier
holds GATE low. Above 0.2V, GATE is released and 50µA
ramps up the compensation network and GATE capaci-
tance at time point 4. Meanwhile, the SS pin voltage
continues to ramp up. When GATE reaches the MOSFET’s
threshold, the MOSFET begins to conduct. Due to the
MOSFET’s high gm, the MOSFET current quickly reaches
the soft-start control value of VACL(t) (Equation 7). At time
point 6, the GATE voltage is controlled by the current limit
amplifier. The soft-start control voltage reaches the circuit
breaker voltage, VCB, at time point 7 and the circuit breaker
TIMER activates. As the load capacitor nears full charge,
load current begins to decline below VACL(t). The current
limit loop shuts off and GATE releases at time point 8. At
time point␣ 9, the SENSE voltage falls below VCB and
TIMER deactivates.
Large values of CSS can cause premature circuit breaker
time out as VACL(t) may exceed the VCB potential during
the circuit breaker delay. The load capacitor is unable to
achieve full charge in one GATE start-up cycle. A more
serious side effect of large CSS values is SOA duration may
be exceeded during soft-start into a low impedance load.
A soft-start voltage below VCB will not activate the circuit
breaker TIMER.
END OF INTIAL TIMING CYCLE
END OF INTIAL TIMING CYCLE
12 34 567 7a
8 9 10 11
TIMER
VTMRH
40µA + 8 • IDRN
5µA
VTMRL
GATE
VGS(th)
50µA
20 • (VACL + VOS)
SS
20 • (VCB + VOS)
20 • VOS
SENSE
50µA
VIN – VGATEH
VACL
VCB
12 3 4 5 6
7
8 9 10 11
TIMER
VTMRH
40µA + 8 • IDRN
5µA
VTMRL
GATE
VGS(th)
SS
50µA
20 • (VACL + VOS)
20 • VOS
SENSE
50µA
VIN – VGATEH
20 • (VCB + VOS)
VACL
VCB
DRAIN
VDRNCL
VDRNL
DRAIN
VDRNCL
VDRNL
PWRGD
(17a) Without External CSS
PWRGD
4214 F17
(17b) With External CSS
Figure 17. Soft-Start Timing (All Waveforms are Referenced to VEE)
421412f
29
Share Link: 
