LTC4214-1/LTC4214-2
APPLICATIO S I FOR ATIO
Power Limit Circuit Breaker
Figure 18 shows the LTC4214-1 in a power limit circuit
breaking application. The SENSE pin is modulated by the
board supply voltage, VSUPPLY. The zener voltage, VZ is set
to be the same as the low supply operating voltage,
VSUPPLY(MIN) = 10V. If the goal is to have the high supply
operating voltage, VSUPPLY(MAX) = 14V give the same
power at VSUPPLY(MIN), then resistors R4 and R6 are
selected using the ratio:
R6 =
VCB
R4 VSUPPLY(MAX)
(16)
If R6 is 20Ω, R4 is 5.6k. The peak circuit breaker power
limit is:
when
VSUPPLY = 0.5 • (VSUPPLY(MIN) + VSUPPLY(MAX)) = 12V.
The peak power at the fault current limit occurs at the
supply overvoltage threshold. The fault current limited
power is:
POWERFAULT =
( ) VSUPPLY
RS
•
VACL
–
VSUPPLY – VZ
• RR46
(18)
( ) POWERMAX
=
VSUPPLY(MIN) + VSUPPLY(MAX) 2
4 • VSUPPLY(MIN) • VSUPPLY(MAX)
• POWERSUPPLY(MIN)
(17)
= 1.029 • POWERSUPPLY(MIN)
VLOGIC
GND
RX
10Ω
CX
100nF
GND
(SHORT PIN)
R1
124k
1%
R2
3.65k
1%
R3
32.4k
1%
RIN
Z1
470Ω
1
VIN
LTC4214-1
9 UV
PWRGD 2
8
OV
10
TIMER
7
DRAIN
6
GATE
CT
47nF
3
SS
4
SENSE
VEE
C1
CSS 5
1nF
22nF
RPULLUP
R4
5.6k
CIN
0.1µF
D1
BZX84C10
R5
10k
D2
1N4148 +
Q2
2N2222
RD
475k
EN
GND
CL
100µF
VOUT
R6 20Ω
RC
10Ω
CC
10nF
Q1
IRF7413
RS
0.025Ω
–12V
Z1: SMAJ15A
4214 F18
Figure 18. Power Limit Circuit Breaking Application
421412f
30