MT48LC8M32B2B5-6 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48LC8M32B2B5-6' PDF : 55 Pages View PDF
PRELIMINARY
256Mb: x32
SDRAM
ALTERNATING BANK READ ACCESSES1
T0
CLK
T1
tCK
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
DQM 0-3
A0-A9, A11
tAS tAH
ROW
T2
tCL
tCH
READ
tCMS tCMH
COLUMN m2
T3
NOP
T4
T5
T6
T7
ACTIVE
NOP
READ
NOP
ROW
COLUMN b2
T8
ACTIVE
ROW
A10
BA0, BA1
DQ
tAS tAH
ROW
ENABLE AUTO PRECHARGE
ROW
ENABLE AUTO PRECHARGE
ROW
tAS tAH
BANK 0
BANK 0
BANK 4
tAC
tAC
tOH
tAC
tOH
BANK 4
tAC
tOH
tAC
tOH
BANK 0
tAC
tOH
tRCD - BANK 0
tRAS - BANK 0
tRC - BANK 0
tRRD
tLZ
CAS Latency - BANK 0
DOUT m
DOUT m + 1
DOUT m + 2
DOUT m + 3
tRP - BANK 0
DOUT b
tRCD - BANK 0
tRCD - BANK 4
CAS Latency - BANK 4
DON’T CARE
UNDEFINED
NOTE: 1. For this example, the burst length = 4, and the CAS latency = 2.
2. A9 and A11 = “Don’t Care.”
09005aef80cd8e48
256MbSDRAMx32.p65 – Rev. B; Pub. 03/04
45
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc.
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