MT48LC8M32B2B5-6 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48LC8M32B2B5-6' PDF : 55 Pages View PDF
READ – DQM OPERATION1
T0
T1
T2
T3
T4
T5
CLK
tCK
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
READ
NOP
NOP
NOP
tCMS tCMH
DQM 0-3
A0-A9, A11
A10
BA0, BA1
tAS tAH
ROW
tAS tAH
ROW
tAS tAH
BANK
COLUMN m 2
ENABLE AUTO PRECHARGE
DISABLE AUTO PRECHARGE
BANK
DQ
tRCD
tAC
tLZ
CAS Latency
tOH
DOUT m
tHZ
tAC
tLZ
NOTE: 1. For this example, the CAS latency = 2.
2. A9 and A11 = “Don’t Care.”
PRELIMINARY
256Mb: x32
SDRAM
T6
T7
T8
NOP
NOP
NOP
tAC
tOH
DOUT m + 2
tOH
DOUT m + 3
tHZ
DON’T CARE
UNDEFINED
09005aef80cd8e48
256MbSDRAMx32.p65 – Rev. B; Pub. 03/04
47
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc.
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