PDSP16488A/A0/GC View Datasheet(PDF) - Zarlink Semiconductor Inc
Part Name
Description
MFG CO.
'PDSP16488A/A0/GC' PDF : 33 Pages View PDF
PDSP16488A
EPROM
VDD
15k
NOM
ALS138
PIXEL DATA
PIXEL CLOCK
SYNC
RESET
CE2 CE3 CE4 CE5 CE6
CLK
HRES
RES
O/C
VDD
15k
NOM
IP7:0
DS
GND R/W
HRES
MASTER
PDSP16488A
(1)
PC1
PROG
CE O/C
RES
VDD BYPASS
L7:0
IP7:0
PC0
PC1
DS
PROG
PDSP16488A
GND R/W
(2)
CE CE2
HRES
RES
VDD BYPASS
DELOP
L7:0
DELAYED SYNC
IP7:0
PC0
PC1
DS
GND R/W
PDSP16488A PROG
(3)
CE CE3
HRES
RES
GND BYPASS
L7:0
IP7:0
PC0
PC1
DS
GND R/W
PROG
PDSP16488A
(4)
CE
CE4
HRES
RES
GND BYPASS
L7:0
IP7:0
PC0
PC1
DS
GND R/W
PDSP16488A PROG
(5)
CE CE5
HRES
RES
GND BYPASS
O/C L7:0
IP7:0
BIN
PC0
PC1
DS
GND R/W
PROG
PDSP16488A
(6)
CE
CE6
HRES
RES
GND BYPASS
OVR
O/C L7:0
OEN
DATA OUT
BIN
OVERFLOW
OUTPUT ENABLE
Fig. 19 Six device non-interlaced system.
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