PIC18F010T-I View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC18F010T-I' PDF : 176 Pages View PDF
PIC18F010/020
MULLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Multiply Literal with WREG
[ label ] MULLW k
0 ≤ k ≤ 255
(WREG) x k → PRODH:PRODL
None
0000 1101 kkkk kkkk
An unsigned multiplication is car-
ried out between the contents of
WREG and the 8-bit literal ’k’.
The 16-bit result is placed in
PRODH:PRODL register pair.
PRODH contains the high byte.
WREG is unchanged.
None of the status flags are
affected.
Note that neither overflow nor
carry is possible in this opera-
tion. A zero result is possible but
not detected.
1
1
Q2
Read
literal ’k’
Q3
Process
Data
Q4
Write
registers
PRODH:
PRODL
Example:
MULLW 0xC4
Before Instruction
WREG
=
PRODH
=
PRODL
=
0xE2
?
?
After Instruction
WREG
=
PRODH
=
PRODL
=
0xE2
0xAD
0x08
MULWF
Multiply WREG with f
Syntax:
[ label ] MULWF f [,a]
Operands:
0 ≤ f ≤ 255
a ∈ [0,1]
Operation:
(WREG) x (f) → PRODH:PRODL
Status Affected: None
Encoding:
0000 001a ffff ffff
Description:
An unsigned multiplication is car-
ried out between the contents of
WREG and the register file loca-
tion ’f’. The 16-bit result is stored
in the PRODH:PRODL register
pair. PRODH contains the high
byte.
Both WREG and ’f’ are
unchanged.
None of the status flags are
affected.
Note that neither overflow nor
carry is possible in this opera-
tion. A zero result is possible but
not detected. If ’a’ is 0, the
Access Bank will be selected,
overriding the BSR value. If ’a’ is
1, the Bank will be selected as
per the BSR value.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Q2
Read
register ’f’
Q3
Process
Data
Q4
Write
registers
PRODH:
PRODL
Example:
MULWF REG
Before Instruction
WREG
=
REG
=
PRODH
=
PRODL
=
0xC4
0xB5
?
?
After Instruction
WREG
=
REG
=
PRODH
=
PRODL
=
0xC4
0xB5
0x8A
0x94
DS41142A-page 122
Preliminary
2001 Microchip Technology Inc.
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