QL5064-33APB484I View Datasheet(PDF) - QuickLogic Corporation
Part Name
Description
MFG CO.
QL5064-33APB484I
QuickLogic Corporation
'QL5064-33APB484I' PDF : 37 Pages View PDF
QL5064 QuickPCI Data Sheet
S
Table 11: PCI DC Specifications for 5V Signaling
ymbol
Parameter
Condition
Min
Vcc
Supply Voltage
4.75
Vih Input High Voltage
2.0
Vil Input Low Voltage
-0.5
Iih Input High Leakage Current
Vin=2.7
Iil
Input Low Leakage Current
Vin=0.5
Voh Output High Voltage
Iout=-2mA
2.4
Vol Output Low Voltage
Iout=3mA, 6mA
Cin Input Pin Capacitance
Cclk CLK Pin Capacitance
5
CIDSEL IDSEL Pin Capacitance
Lpin Pin Inductance
Ioff PME# input leakage
Vo£5.25VVcc off or floating
-
Max
5.25
Vcc+0.5
0.8
70
-70
0.55
10
12
8
20
1
Units
V
V
V
mA
mA
V
V
pF
pF
PF
nH
mA
Table 12: PCI Timing Parameters
Symbol
Parameter
75MHz
66MHz
33MHz
Min Max Min Max Min Max Units
Tval CLK to Signal Valid Delay -bused signals
2 5.34 2
6
2
11 ns
Tval (ptp) CLK to Signal Valid Delay - point to point signals 2 5.34 2
6
2
12 ns
Ton Float to Active Delay
2
-
2
-
2
-
ns
Toff Active to Float Delay
- 12.45 -
14
-
28 ns
Tsu Input Setup Time to CLK - bused signals
2.67 -
3
-
7
-
ns
Tsu(ptp) Input Setup Time to CLK - point to point signals 4.45 -
5
- 10, 12 -
ns
Th Input Hold Time from CLK
0
-
0
-
0
-
ns
Trst Reset Active Time after power stable
1
-
1
-
1
- ms
Trst-clk Reset Active Time after CLK stable
100
-
100 - 100
- ms
Trst-off Reset Active to output float delay
-
40
-
40
-
40 ns
trrsu REQ64# to RST# setup time
10Tcyc - 10Tcyc - 10Tcyc -
ns
trrh RST# to REQ64# hold time
0
50
0
50
0
50 ns
Trhfa RST# high to first Configuration access
225
-
225 - 225
- clocks
Trhff RST# high to first FRAME# assertion
5
5
5
clocks
QL5064 QuickPCI Data Sheet Rev D
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