QL5332 View Datasheet(PDF) - QuickLogic Corporation

Part Name

Description

MFG CO.

QL5332

33 MHz/32-Bit PCI Master/Target with Embedded Programmable Logic and Dual Port SRAM

QuickLogic Corporation 

1 2 3 4 5 6 7 8 9 10 Next

QL5332 QuickPCI Data Sheet Rev. C

DMA Master/Target Control

The customizable DMA controller included with the QuickWorks design software contains the following

features:

• Configurable DMA count size for Reads and Writes (up to 30-bits)

• Configurable DMA burst size for PCI (including unlimited/continuous burst)

• Customizable PCI command to use by core

• Customizable Byte Enable signal

• Programmable Arbitration between DMA Read & Write transactions

• DMA Registers may be mapped to any area of Target Memory Space

 Read Address (32-bit register)

 Write Address (32-bit register)

 Read Length (16-bit register) / Write Length (16-bit register)

 Control and Status (32-bit register, includes 8 bit Burst Length)

• DMA Registers are available to the local design or the PCI bus

• Programmable Interrupt Control to signal end of transfer or other event

Configurable FIFOs

QuickWorks SpDE has a Creation Wizard that is used to create FIFOs. FIFOs may be designed up to 256 deep.

Using the 12 QuickLogic RAM modules, the combinations include:

• 6 FIFOs at 64 deep (36 wide)

• 3 FIFOs at 128 deep (36 wide)

• 1 FIFO at 256 deep (48 wide)

© 2004 QuickLogic Corporation

www.quicklogic.com

•

•••

••

3

Share Link: