QL901M View Datasheet(PDF) - QuickLogic Corporation
Part Name
Description
MFG CO.
'QL901M' PDF : 37 Pages View PDF
Table 11: Standard Input Delays
Symbol
Parameter
Standard
Input Delays
To get the total input delay and this delay to tISU
tSID (LVTTL) LVTTL input delay: Low Voltage TTL for 3.3V applications
tSID (LVCMOS2)
LVCMOS2 input delay: Low Voltage CMOS for 2.5V and lower
applications
tSID (GTL+) GTL+ input delay: Gunning Transceiver Logic
tSID (SSTL3) SSTL3 input delay: Stub Series Terminated Logic for 3.3V
tSID (SSTL2) SSTL2 input delay: Stub Series Terminated Logic for 2.5V
Propagation
delay (ns)
0.34
0.42
0.68
0.55
0.607
R
CLK
D
tISU
tIHL
Q
tICLK
tIRST
E
tIESU
tIEH
Figure 15: QuickMIPS Input Register Cell Timing
QL901M QuickMIPS™ Data Sheet Rev B
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