SAA7392HL/M2B View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
'SAA7392HL/M2B' PDF : 76 Pages View PDF
Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
7.5.9 VITERBI DETECTOR SETTING REGISTER (VITSET)
This register controls an advanced data slicer for improved
bit detector performance.
• An adaptive slicer performs a second slice operation.
This has a higher bandwidth than the first slicer.
• If switched on, the run length 2 push-back circuit pushes
all run length two symbols to run length 3. The circuit will
determine which transition was most likely in error and
shift transition on that edge.
To avoid advanced detector hang-up, caused by a
detection level that is too high and is not brought down, a
Watchdog counter on the slicer level is installed.
The Watchdog counter is a counter that counts on the
front-end PLL clock.
• If rl1 or a rl2 received: count + stepsize
• Elsif no transition: count + 1
• Elsif transition on a valid runlength: count − 8
• Elsif (count > maxcount): reset count.
Stepsize and maxcount can be set by writing to the VitSet
register. On a reset of the counter the slice level is also
reset.
Table 45 Viterbi Detector Setting Register (address 16H) - WRITE
7
AdSliceON
6
AdDetON
5
4
FEndAutoSON RL2PB
3
WDog
2
MaxCnt
1
0
WDogCnt.1 WDogCnt.0
Table 46 Description of VitSet bits
BIT
SYMBOL
DESCRIPTION
7
AdSliceON If AdSliceON = 0, then slicer reset (to logic 0). If AdSliceON = 1, then slicer active.
6
AdDetON If AdDetON = 0, then advanced bit detector off. If AdDetON = 1, then advanced bit
detector on.
5
FEndAutoSON If FEndAutoSON = 0, then auto-scaling in front-end Hold mode. If FEndAutoSON = 1,
then auto-scaling in front-end on.
4
RL2PB
If RL2PB = 0, then run length 2 push-back off. If RL2PB = 1, then run length 2
push-back on.
3
WDog
If WDog = 0, then slicer Watchdog is off. If WDog = 1, then slicer Watchdog is on.
2
MaxCnt
If MaxCnt = 0, then maxcount is 1024. If MaxCnt = 1, then maxcount is 2048.
1
WDogCnt.1 These 2 bits select the Watchdog count step; see Table 47.
0
WDogCnt.0
Table 47 Selection of Watchdog count step
WDogCnt.1
0
0
1
1
WDogCnt.0
0
1
0
1
WATCHDOG COUNT STEP
32
64
128
256
7.5.10 MOTOR CONTROL REGISTER 1 (MOTOR1)
When read this register holds the 8-bit advanced slicer compensation value.
2000 Mar 21
27
Share Link: 
