Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
7.10.5 MOTOR CONTROL REGISTER 4 (MOTOR4)
Table 81 Motor Control Register (address 0FH) - WRITE
7
PWM_PDM
6
OVF_SW
5
SW1
4
SW2
3
MSCON.3
2
MSCON.2
1
MSCON.1
0
MSCON.0
Table 82 Description of Motor4 bits
BIT
SYMBOL
DESCRIPTION
7
PWM_PDM If PWM_PDM = 0, then motor control in PWM mode. If PWM_PDM = 1, then motor
control in PDM mode.
6
OVF_SW If OVF_SW = 0, then SW1 and SW2 in normal operation. If OVF_SW = 1, then SW1
and SW2 will both open on overflow.
5
SW1 If SW1 = 0, then SW1 is open. If SW1 = 1, then SW1 is closed.
4
SW2 If SW2 = 0, then SW2 is open. If SW2 = 1, then SW2 is closed.
3
MSCON.3 These 4 bits are used to select the motor servo state; see Table 83.
2
MSCON.2
1
MSCON.1
0
MSCON.0
Table 83 Selection of motor servo state
MSCON.3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
MSCON.2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
MSCON.1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
MSCON.0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
MOTOR SERVO STATE
Motor servo active.
Motor servo off (clears integrator).
Motor servo 3-state (motor output pin 3-states).
These 5 codes are reserved.
Motor start at 37% power.
Motor start at 50% power.
Motor start at 75% power.
Motor start at 100% power.
Motor stop at 37% power.
Motor stop at 50% power.
Motor stop at 75% power.
Motor stop at 100% power.
2000 Mar 21
43