Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
7.10.9 TACHO CONTROL REGISTER 3 (TACHO3)
Table 88 Tacho Control Register 3 (address 19H) - WRITE
7
SConS.1
6
SConS.0
5
TachoFRes
4
Moto2/T3
3
Fsam.1
2
Fsam.0
1
0
TachoIntLF TachoMode
Table 89 Description of Tacho3 bits
BIT
SYMBOL
DESCRIPTION
7
SConS.1 These 2 bits select the motor servo frequency source; see Table 90.
6
SConS.0
5
TachoFRes If TachoFRes = 0, then the tacho filter is enabled (normal mode). If TachoFRes = 1, then
the tacho filter is reset.
4
Moto2/T3 If Moto2/T3 = 0, then MOTO2 pin is an output. If Moto2/T3 = 1, then MOTO2 pin is
tacho T3.
3
Fsam.1 These 2 bits select the tacho sample rate (fs) as shown below:
2
Fsam.0
fs(Hz) = -2---2----×-----F----s---a---m-----<---1---3-:--02--->-7---6-×--8---s---y---s---t-e----m------c---l--o---c---k--
1
TachoIntLF If TacholntLF = 0, then tacho interrupt is enabled on frequencies LOWER than set-point.
If TacholntLF = 1, then tacho interrupt is enabled on frequencies HIGHER than
set-point.
0
TachoMode If TachoMode = 0, tacho is in 3-pin mode. If TachoMode = 1, tacho is in 1-pin mode.
Table 90 Motor servo frequency source selection
SConS.1
0
0
1
1
SConS.0
0
1
0
1
MOTOR SERVO FREQUENCY SOURCE
Motor servo locks to PLL clock (recovered from channel EFM).
This value is reserved.
Motor servo runs on tacho frequency.
This value is reserved.
2000 Mar 21
45