SAA7392HLM2B View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
'SAA7392HLM2B' PDF : 76 Pages View PDF
Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
7.14.2 ENCODE START OFFSET REGISTER (ENCODESTARTOFFSET)
Table 106 Encode Start Offset Register (address 31H) - WRITE
7
6
5
4
3
2
1
0
StartOffset.7 StartOffset.6 StartOffset.5 StartOffset.4 StartOffset.3 StartOffset.2 StartOffset.1 StartOffset.0
Table 107 Description of EncodeStartOffset bits
BIT
7 to 0
SYMBOL
StartOffset<7:0>
DESCRIPTION
If enabled, WriteOn flags are delayed by EncodeStartOffset pulses of
W441 when starting the encode process.
7.14.3 ENCODE STOP OFFSET REGISTER (ENCODESTOPOFFSET)
Table 108 Encode Stop Offset Register (address 32H) - WRITE
7
6
5
4
3
2
1
0
StopOffset.7 StopOffset.6 StopOffset.5 StopOffset.4 StopOffset.3 StopOffset.2 StopOffset.1 StopOffset.0
Table 109 Description of EncodeStopOffset bits
BIT
7 to 0
SYMBOL
StopOffset<7:0>
DESCRIPTION
If enabled, WriteOn flags are delayed by EncodeStopOffset pulses of
W441 when stopping the encode process.
7.14.4 ENCODE XOFFSET REGISTER (ENCODEXOFFSET)
The 10-bit value for Xoffset must be written in two steps. EncodeXOffset can be written to in any order. XOffset<9:0> is
a 2’s complement number which gives a range of −511 to 511.
Table 110 Encode XOffset Register (address 33H) - WRITE
7
6
5
4
3
0
0
XOffset.5 XOffset.4 XOffset.3
0
1
−
−
XOffset.9
2
XOffset.2
XOffset.8
1
XOffset.1
XOffset.7
0
XOffset.0
XOffset.6
Table 111 Description of EncodeXoffset bits
BIT
7 to 0
SYMBOL
XOffset<9:0>
DESCRIPTION
Offset applied to the phase error calculated between ATIPSync and
Q-code sync.
2000 Mar 21
51
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