SAA7392HLM2B View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
'SAA7392HLM2B' PDF : 76 Pages View PDF
Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
7.15.3 EFM MODULATOR CONFIGURATION REGISTER 2 (EFMMODCONFIG2))
Table 116 EFM Modulator Configuration Register 2 (address 3EH) - WRITE
7
6
5
4
3
2
−
−
−
−
−
TIM2Mode
1
0
TIM2ClkOn DataSel.2
Table 117 Description of EFMModConfig2 bits
BIT
7 to 3
2
1
0
SYMBOL
−
TIM2Mode
TIM2ClkOn
DataSel.2
DESCRIPTION
These 5 bits are reserved.
These 2 bits control the XEFM output; see Table 118.
This bit along with the DataSel.1 and DataSel.0 bits in register EFMModConfig select
the output data format; see Table 119.
Table 118 Control of the XEFM output
TIM2Mode
0
1
1
TIM2ClkOn
X
XEFM is operated according to GateClkOn bit setting in the EFMCON register
(address 3DH).
0
XEFM output is not influenced by LaserOn/WriteOn and is off.
1
XEFM is gated on.
Table 119 Selection of output data format
DataSel.2
0
0
0
0
1
X
DataSel.1
0
0
1
1
0
X
DataSel.0
0
1
0
1
1
X
OUTPUT DATA FORMAT
hold data output at zero
output normal data
output I3 pattern
output I11 pattern
output special OPC pattern 3-3-4-4-5-5-6-6-7-7
All other settings are reserved.
2000 Mar 21
53
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