ST40RA166 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST40RA166' PDF : 88 Pages View PDF
ST40RA166
7 Pin description
Pin name
TXD1
NOTRST
IRL0
IRL1
IRL2
IRL3
NMI
TMUCLK
LPCLKIN
LPCLKOSC
VDDRTC
CLKIN
CLKOSC
AUXCLKOUT
STATUS0
STATUS1
AUDATA0
AUDATA1
AUDATA2
AUDATA3
AUDSYNC
AUDCLK
NOTASEBRK
DCLK
TCK
TMS
NOTTRST
TDI
TDO
EADDR2
EADDR3
EADDR4
BPN
Row Col
Architecture
signal name
Pin function
Default
Alternate
W
19
TXD1/PIO5
E
14
NOTRESET
C
10
IRL0
C
11
IRL1
C
12
IRL2
D
13
IRL3
C
13
NMI
E
15
TCLK
E
12
EXTAL2
E
13
XTAL2
E
11
VCCRTC
E
20
CLKIN
D
20
CLKOSC
E
19
CKIO
C
14
STATUS0
D
14
STATUS1
C
18
AUDATA0
C
17
AUDATA1
C
16
AUDATA2
C
15
AUDATA3
D
15
AUDSYNC
D
19
AUDCK
E
9
NOTASEBRK/
BRKACK
D
11
DCK
D
12
TCK
D
10
TMS
E
7
TRST
E
6
TDI
E
8
TDO
V
4
MA2
U
4
MA3
V
5
MA4
SCI transmit data output
PIO5
Power on reset
Interrupt request signal
Interrupt request signal
Interrupt request signal
Interrupt request signal
Nonmaskable interrupt
RTC output clock
TMU input clock
RTC crystal resonator input: on VDDRTC supply
RTC crystal resonator output: on VDDRTC supply
Real-time clock supply
System clock input: on VDDCORE supply
Crystal resonator pin: on VDDCORE supply
Reference 27 MHz clock
output
Processor operating status
Processor operating status
AUD bus command and data
AUD bus command and data
AUD bus command and data
AUD bus command and data
AUD command valid
AUD clock output
Dedicated emulator pin
Clock for udi
Test clock
Test mode
Test reset
Test data input
Test data output
EMI external address
EMI external address
EMI external address
MODE0
MODE1
MODE2
Table 34: PBGA ballout for ST40RA166 (page 7 of 11)
Pin
Type
Dir
C2A O I/O
-
I
-
I
-
I
-
I
-
I
-
I
C2B I/O I/O
-
I
-
O
I
-
I
-
O
-
O
-
O
-
O
-
O
-
O
-
O
-
O
-
O
-
O
C4
I/O
-
I
-
I
-
I
-
I
-
I
-
O
E4
OI
E4
OI
E4
OI
64/88
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