ST40RA166 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST40RA166' PDF : 88 Pages View PDF
7 Pin description
ST40RA166
Pin name
NOTECAS
EWAIT
NOTEWE
EPENDING
MCLKOUT
NOTMREQ
NOTMACK
FCLKOUT
NOTFBAA
NOTESCS0
NOTESCS1
NOTESCS2
BPN
Row Col
Architecture
signal name
Pin function
Default
Alternate
T
3
NOTECAS
T
10
EWAIT
V
3
NOTEWR
N
3
EPENDING
Y
10
MCLKOUT
R
3
NOTMREQ
P
3
NOTMACK
V
10
FCLKOUT
N
5
-
L
5
-
M
5
-
M
4
-
External column address strobe, MFRAME
(MPX_FRAME) and EOE_N (EMI output enable
signal)
External wait command
(notready)
External read not write
EMI pending refresh or
access
MPX clock
MPX bus request
MPX bus acknowledge
Flash clock
Flash bus address advance
Reserved tri-state
MBXINT
Reserved tri-state
EMPIDREQ0
Reserved tri-state
EMPIDRAK0
Pin
Type
Dir
E4
O I/O
E4
I/O
E4
I/O
E4
O
-
O
-
I/O
-
I/O
-
O
-
O
P8
O
P8
O
P8
I
GND
H8:N13
36 ball array for ground supply and heat dissipation
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
M
6
VDDCORE
N
6
VDDCORE
P
6
VDDCORE
R
6
VDDCORE
R
7
VDDCORE
R
8
VDDCORE
R
9
VDDCORE
R
10
VDDCORE
R
11
VDDCORE
T
11
VDDCORE
R
12
VDDCORE
R
13
VDDCORE
R
14
VDDCORE
M
15
VDDCORE
N
15
VDDCORE
P
15
VDDCORE
Table 34: PBGA ballout for ST40RA166 (page 10 of 11)
67/88
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