ST40RA166 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST40RA166

32-bit Embedded SuperH Device

STMicroelectronics 

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A Interconnect architecture

ST40RA166

PER_LATENCY_EMPI

[3:0] EMPI_PRIORITY

[15:4] Reserved

[23:16] EMPI_LATENCY

[31:24] Reserved

Peripheral arbiter: EMPI intitiator priority and

latency

Defines priority for EMPI

Reset: 0x1

Defines maximum accepted latency for EMPI

Reset: 0x00

0x428

RW

RW

PER_LATENCY_GPDMA

[3:0] GPDMA_PRIORITY

[15:4] Reserved

[23:16] GPDMA_LATENCY

[31:24] Reserved

Peripheral arbiter: GPDMA intitiator priority and

latency

Defines priority for GPDMA

Reset: 0x0

Defines maximum accepted latency for GPDMA

Reset: 0x00

0x430

RW

RW

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