ST40RA166 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST40RA166' PDF : 88 Pages View PDF
ST40RA166
B Implementation restrictions
B.6 PIO
B.6.1 PIO default functionality following reset
In the ST40 family device, the operational modes for these registers differ from the standard
architecture definition and are shown in Table 37.
PIO bit configuration
PIO output state PIO.PC2 PIO.PC1 PIO.PC0
NonPIO functiona
PIO bidirectional
-
0
0
0
Open drain
0
0
1
PIO output
PIO bidirectional
Push-pull
0
1
0
Open drain
0
1
1
PIO input
High impedance
1
0
0
PIO input
Reserved
High impedance
1
0
1
-
1
1
0
Reserved
-
1
1
1
Table 37: PIO alternate function registers
a. State following reset
B.6.2 PCI/PIO alternate functions
The following PIO signals cannot be used when PCI is enabled even if the PCI implementation does
not require the primary pin function
Pin name
NOTPREQ0
NOTPREQ1
BPN
Row Col
Architecture
signal name
E
18
NOTPCI_REQ0
E
17
NOTPCI_REQ1
Pin function
Default
PCI external request for bus
PCI external request for bus
Alternate
PIO16
PIO18
Pin
Type Dir
P8
I/O I/O
P8
I I/O
NOTPREQ2
F
NOTPREQ3
G
16
NOTPCI_REQ2
16
NOTPCI_REQ3
PCI external request for bus PIO20
P8
PCI external request for bus PIO22
P8
EMPIDREQ1
Table 38: PCI/PIO alternate functions
I I/O
I I/O
O
If PCI is disabled, the alternate functions may be used.
84/88
Share Link: 
