ST62T85B/E85B
4.4.2 CLOCK GENERATION
The character options are summarised in the fol-
The UART contains a built-in divider of the MCU lowing table.
internal clock for most common Baud Rates as
shown in Table 19. Other baud rate values can be
Table 18. Character Options
calculated from the chosen oscillator frequency di-
Start Bit 8 Data 1 Software Parity
1 Stop
vided by the Divisor value shown.
Start Bit 9 Data No Parity
1 Stop
The divided clock provides a frequency that is 8 Start Bit 8 Data No Parity
2 Stop
times the desired baud rate. This allows the Data
reception mechanism to provide a 2 to 1 majority
voting system to determine the logic state of the
asynchronous incoming serial logic bit by taking 3
timed samples within the 8 time states.
Start Bit 7 Data 1 Software Parity
2 Stop
Bit 9 remains in the state programmed for consec-
utive transmissions until changed by the user or
until a character is received when the state of this
bit is changed to that of the incoming bit 9. The
The bits not sampled provide a buffer to compen- recommended procedure is thus to set the value of
sate for frequency offsets between sender and re- this bit before transmission is started.
ceiver.
Transmission is started by writing to the Data Reg-
4.4.3 DATA TRANSMISSION
ister (the Baud Rate and Bit 9 should be set before
Transmission is fixed to a format of one start bit,
) nine data bits and one stop bit. The start and stop
t(s bits are automatically generated by the UART. The
nine databits are under control of the user and are
c flexible in use. Bits 0..7 are typically used as data
u bits while bit 9 is typically used as parity, but can
d also be a 9th data bit or an additional Stop bit. As
ro parity is not generated by the UART, it should be
P calculated by program and inserted in the appro-
priate position of the data (i.e as bit 7 for 7-bit data,
te with Bit 9 set to 1 giving two effective stop bits or
bsole as the independent bit 9).
this action). The UARTOE signal switches the out-
put multiplexer to the UART output and a start bit
is sent (a 0 for one bit time) followed by the 8 data
values (lsb first) and the value of the Bit9 bit. The
output is then set to 1 for a period of one bit time to
generate a Stop bit, and then the UARTOE signal
returns the TXD1 line to its alternate I/O function.
The end of transmission is flagged by setting
TXMT to 1 and an interrupt is generated if ena-
bled. The TXMT flag is reset by writing a 0 to the
bit position, it is also cleared automatically when a
new character is written to the Data Register.
TXMT can be set to 1 by software to generate a
software interrupt so care must be taken in manip-
ulating the Control Register.
- O Figure 24. Data Sampling Points
ct(s) 1 BIT
Obsolete Produ 0 1 2
3 4 56
SAMPLES
78
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Figure 25. Character Format
START
BIT
D0 D1
BIT
12
POSITION
START OF DATA
STOP
BIT
D7 D8
8 9 10
POSSIBLE
NEXT
CHARACTER
START
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