ST6285B View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST6285B

8-BIT OTP/EPROM MCU WITH LCD DRIVER, EEPROM AND A/D CONVERTER

STMicroelectronics 

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ST62T85B/E85B

4.4.4 DATA RECEPTION

4.4.5 INTERRUPT CAPABILITIES

The UART continuously looks for a falling edge on Both reception and transmission processes can in-

the input pin whenever a transmission is not ac- duce interrupt to the core as defined in the inter-

tive. Once an edge is detected it waits 1 bit time (8 rupt section. These interrupts are enabled by set-

states) to accommodate the Start bit, and then as- ting TXIEN and RXIEN bit in the UARTCR register,

sembles the following serial data stream into the and TXMT and RXRDY flags are set accordingly

data register. The data in the ninth bit position is to the interrupt source.

copied into Bit 9, replacing any previous value set

for transmission. After all 9 bits have been re-

ceived, the Receiver waits for the duration of one

4.4.6 REGISTERS

UART Data Register (UARTDR)

bit (for the Stop bit) and then transfers the received Address: D6h, Read/Write

data into the buffer register, allowing a following

7

0

character to be received. The interrupt flag

RXRDY is set to 1 as the data is transferred to the

buffer register and, if enabled, will generate an in-

D7 D6 D5 D4 D3

D2

D1

D0

terrupt.

Bit7-Bit0. UART data bits. A write to this register

If a transmission is started during the course of a loads the data into the transmit shift register and

reception, the transmission takes priority and the

) reception is stopped to free the resources for the

t(s transmission. This implies that a handshaking sys-

tem must be implemented, as polling of the UART

c to detect reception is not available.

du Figure 26. UART Data Output

Pro UARTOE

triggers the start of transmission. In addition this

resets the transmit interrupt flag TXMT. A read of

this register returns the data from the Receive

buffer.

Warning. No Read/Write Instructions may be

used with this register as both transmit and receive

share the same address

te TXD

sole PORT DATA

Ob OUTPUT

1

MUX

0

TXD1

VR02011

t(s) - Table 19. Baud Rate Selection

uc BR2

rod 0

0

P 0

te 0

le 1

o1

bs1

O1

BR2

0

0

1

1

0

0

1

1

BR0

0

1

0

1

0

1

0

1

fINT Division

6.656

3.328

1.664

832

416

256

208

Baud Rate

fINT = 8MHz

1200

fINT = 4MHz

600

2400

1200

4800

2400

9600

4800

19200

9600

31200

15600

38400

19200

Reserved

49/78

49

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