ST72321BR9-AUTO View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST72321BR9-AUTO

8-bit MCU for automotive with 32 to 60 Kbyte Flash/ROM, ADC, 5 timers, SPI, SCI, I2C interface

STMicroelectronics 

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Supply, reset and clock management

ST72321Bxxx-Auto

Note:

Provided the minimum VDD value (guaranteed for the oscillator frequency) is above VIT-, the

MCU can only be in two modes:

– under full software control

– in static safe reset

In these conditions, secure operation is always ensured for the application without the need

for external reset hardware.

During a low voltage detector reset, the RESET pin is held low, thus permitting the MCU to

reset other devices.

The LVD allows the device to be used without any external RESET circuitry.

If the medium or low thresholds are selected, the detection may occur outside the specified

operating voltage range. Below 3.8V, device operation is not guaranteed.

The LVD is an optional function which can be selected by option byte.

It is recommended to make sure that the VDD supply voltage rises monotonously when the

device is exiting from Reset, to ensure the application functions properly.

Figure 14. Low voltage detector versus reset

VDD

VIT+

VIT-

Vhys

RESET

6.6.2

Caution:

Auxiliary voltage detector (AVD)

The auxiliary voltage detector function (AVD) is based on an analog comparison between a

VIT-(AVD) and VIT+(AVD) reference value and the VDD main supply or the external EVD pin

voltage level (VEVD). The VIT- reference value for falling voltage is lower than the VIT+

reference value for rising voltage in order to avoid parasitic detection (hysteresis).

The output of the AVD comparator can be read directly by the application software through a

real-time status bit (AVDF) in the SICSR register. This bit is read only.

The AVD function is active only if the LVD is enabled through the option byte.

Monitoring the VDD main supply

This mode is selected by clearing the AVDS bit in the SICSR register.

The AVD voltage threshold value is relative to the selected LVD threshold configured by

option byte (see Section 21.1.1: Flash configuration on page 228).

If the AVD interrupt is enabled, an interrupt is generated when the voltage crosses the

VIT+(AVD) or VIT-(AVD) threshold (AVDF bit toggles).

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