ST7689-G4 View Datasheet(PDF) - Sitronix Technology Co., Ltd.

Part Name

Description

MFG CO.

ST7689-G4

128RGB x 160 dot 65K Color with Frame Memory Single-Chip CSTN Controller/Driver

Sitronix Technology Co., Ltd. 

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ST7689

7.2. Access to DDRAM and Internal Registers

ST7689 realizes high-speed data transfer because the access from MPU is a sort of pipeline processing done via the

bus holder attached to the internal, requiring the cycle time alone without needing the wait time.

For example, when MPU writes data to the DDRAM, the data is once held by the bus holder and then written to the

DDRAM before the succeeding write cycle is started. When MPU reads data from the DDRAM, the first read cycle is

dummy and the bus holder holds the data read in the dummy cycle, and then it read from the bus holder to the system bus

in the succeeding read cycle. Figure 4 illustrates these relations.

In 80-series interface mode:

Figure 4 Write / Read Operation between MPU and ST7689

Version 1.0

Page 37 of 195

2009/10

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