ST7689-G4 View Datasheet(PDF) - Sitronix Technology Co., Ltd.
Part Name
Description
MFG CO.
ST7689-G4
Sitronix Technology Co., Ltd.
'ST7689-G4' PDF : 195 Pages View PDF
ST7689
7.3. Display Data RAM (DDRAM)
7.3.1. DDRAM
It is 128 X 160 X 16 bits capacity RAM prepared for storing dot data. Refer to the following memory map for the RAM
configuration.
Memory Map
Data control command
(MADCTL) MX=0
RGB alignment
Column
0
1
…
127
127
(MADCTL) MX=1
126
…
0
Color
R
G
B
R
G
B
R
G
B
Data
Page
(MADCTL) (MADCTL)
MY=0
MY=1
0
159
1
158
2
157
3
156
4
155
5
154
6
:
7
:
:
:
:
7
:
6
154
5
155
4
156
3
157
2
158
1
159
0
SEGout
0
1
2
3
4
5 … 381
382 383
Note:You can change position of R and B with MADCTL command.
7.3.2. Address Control
The address counter sets the addresses of the display data RAM for writing.
Data is written pixel into the RAM matrix of ST7689. The data for one pixel or two pixels is collected (RGB 5-6-5 bit),
according to the data formats. As soon as this pixel-data information is complete, the “Write access” is activated on the
RAM. The locations of RAM are addressed by the address pointers. The address ranges are X=0 to X=127 (7Fh) and Y=0
to Y=159 (9Fh). Addresses outside these ranges are not allowed.
Version 1.0
Page 38 of 195
2009/10
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