SX8801IRXXMLTRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SX8801IRXXMLTRT' PDF : 135 Pages View PDF
XE8801A – SX8801R
pos. RegUsrtCtrl
rw
7-4 -
r
3
UsrtWaitS0
r
2
UsrtEnWaitCond1 rw
1
UsrtEnWaitS0
rw
0
UsrtEnable
rw
reset
“0000”
0 resetsystem
0 resetsystem
0 resetsystem
0 resetsystem
function
Unused
Clock stretching flag (0=no stretching),
cleared by writing RegUsrtBufferS1
Enable stretching on UsrtCond1 detection
(0=disable)
Enable stretching operation (0=disable)
Enable USRT operation (0=disable)
Table 15-3: RegUsrtCtrl
pos. RegUsrtCond1 rw
reset
function
7-1 -
r 0000000
Unused
0
UsrtCond1
r/c 0 resetsystem State of condition 1 detection (1 =detected),
cleared when written.
Table 15-4: RegUsrtCond1
pos. RegUsrtCond2 rw
reset
function
7-1 -
r 0000000
Unused
0
UsrtCond2
r/c 0 resetsystem State of condition 2 detection (1 =detected),
cleared when written.
Table 15-5: RegUsrtCond2
pos. RegUsrtBufferS1 rw
7-1 -
r
r
0
UsrtBufferS1
w
reset
0000000
x
function
Unused
Value on S1 at last S0 rising edge.
Clear RegUsrtEdgeS0 bit in RegUsrtEdgeS0
Clear UsrtWaitS0 bit in RegUsrtCtrl with any
value
Table 15-6: RegUsrtBufferS1
pos. RegUsrtEdgeS0 rw
reset
function
7-1 -
r 0000000
Unused
0
UsrtEdgeS0
r 0 resetsystem State of rising edge detection on S0
(1=detected). Cleared by reading
RegUsrtBufferS1
Table 15-7: RegUsrtEdgeS0
15.4 Interrupts map
interrupt
source
Irq_cond1
Irq_cond2
default mapping in the interrupt manager
RegIrqMid(7)
RegIrqMid(6)
Table 15-8: Interrupts map
© Semtech 2005
15-3
www.semtech.com
Share Link: 
