SX8801IRXXMLTRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SX8801IRXXMLTRT' PDF : 135 Pages View PDF
XE8801A – SX8801R
16.3 Register map
There are eight registers in the acquisition chain (AC), namely RegAcOutLsb, RegAcOutMsb, RegAcCfg0,
RegAcCfg1, RegAcCfg2, RegAcCfg3, RegAcCfg4 and RegAcCfg5. Table 16-2 to Table 16-9 show the mapping
of control bits and functionality of these registers while Table 16-1 gives an overview of these eight.
The register map only gives a short description of the different configuration bits. More detailed information is found
in subsequent sections.
register name
RegAcOutLsb
RegAcOutMsb
RegAcCfg0
RegAcCfg1
RegAcCfg2
RegAcCfg3
RegAcCfg4
RegAcCfg5
Table 16-1: AC registers
pos. RegAcOutLsb
7:0
Out[7:0]
rw reset
r
00000000
resetsystem
description
LSB of the output code
Table 16-2: RegAcOutLsb
pos. RegAcOutMsb
7:0
Out[15:8]
rw reset
r
00000000
resetsystem
description
MSB of the output code
Table 16-3: RegAcOutMsb
pos. RegAcCfg0
rw reset
description
7
Start
w r0 0 resetsystem
starts a conversion
6:5 SET_NELCONV[1:0] r w 01 resetsystem
sets the number of elementary conversions
4:2
SET_OSR[2:0]
r w 010 resetsystem
sets the oversampling rate of an elementary
conversion
1
CONT
r w 0 resetsystem
continuous conversion mode
0
reserved
r w 0 resetsystem
Table 16-4: RegAcCfg0
pos. RegAcCfg1
rw reset
description
7:6 IB_AMP_ADC[1:0] r w 11 resetsystem
Bias current selection of the ADC converter
5:4 IB_AMP_PGA[1:0] r w 11 resetsystem
Bias current selection of the PGA stages
3:0
ENABLE[3:0]
rw
0000
resetsystem
Enables the different PGA stages and the ADC
Table 16-5: RegAcCfg1
© Semtech 2005
16-3
www.semtech.com
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