VG36128401A View Datasheet(PDF) - Vanguard International Semiconductor
Part Name
Description
MFG CO.
'VG36128401A' PDF : 69 Pages View PDF
VIS
Preliminary
VG36128401A
VG36128801A
VG36128161A
CMOS Synchronous Dynamic RAM
Self Refresh (Entry and Exit)
CLK
CKE
CS
CLK can be Stopped*
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
tSRX
tCKS
tSRX
tCKS
RAS
CAS
WE
BS
A10
ADD
DQM
tRC
t
RC
Hi-Z
DQ
All Banks
must be idle
Self refresh
Entry
Self Refresh
Exit
Self Refresh
Entry Self Refresh
Exit
Activate
Command
* Clock can be stopped at CKE=Low. If clock is stopped, it must be restarted/stable for 4 clock cycles before CKE=High
Document : 1G5-0154
Rev.1
Page 41
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