XRT7302IQ80 View Datasheet(PDF) - Exar Corporation

Part Name

Description

MFG CO.

XRT7302IQ80

2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

Exar Corporation 

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2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

XRT7302

TABLE OF CONTENTS

REV. 1.1.0

General description ........................................................................................................... 1

APPLICATIONS ......................................................................................................................................... 1

FEATURES ................................................................................................................................................ 1

XRT7302 BLOCK DIAGRAM ..................................................................................................................... 1

TRANSMIT INTERFACE CHARACTERISTICS ........................................................................................ 2

RECEIVE INTERFACE CHARACTERISTICS ........................................................................................... 2

PIN OUT OF THE XRT7302 ...................................................................................................................... 2

TABLE OF CONTENTS I

LIST OF FIGURES V

LIST OF TABLES VI

Pin descriptions ................................................................................................................. 3

ELECTRICAL CHARACTERISTICS ................................................................................. 18

ABSOLUTE MAXIMUM RATINGS ...................................................................................... 18

SYSTEM DESCRIPTION ................................................................................................... 26

THE TRANSMIT SECTION (CHANNELS 1 AND 2) ................................................................................ 26

THE RECEIVE SECTION (CHANNELS 1 AND 2) ................................................................................... 26

THE MICROPROCESSOR SERIAL INTERFACE ................................................................................... 26

THE HARDWARE MODE ........................................................................................................................ 26

THE HOST MODE ................................................................................................................................... 26

1.0 SELECTING THE DATA RATE ......................................................................................................... 27

1.1 CONFIGURING CHANNEL 1 ............................................................................................................. 27

COMMAND REGISTER, CR4 (ADDRESS = 0X04) ............................................................ 28

1.2 CONFIGURING CHANNEL 2 ............................................................................................................. 28

COMMAND REGISTER, CR12 (ADDRESS = 0X0C) ......................................................... 29

2.0 THE TRANSMIT SECTION ............................................................................................................... 29

2.1 THE TRANSMIT LOGIC BLOCK ......................................................................................................... 29

Accepting "Dual-Rail" Data from the Terminal Equipment .......................................................... 29

Accepting "Single-Rail" Data from the Terminal Equipment ....................................................... 30

COMMAND REGISTER 1 (ADDRESS = 0X01) .................................................................. 31

COMMAND REGISTER 9 (ADDRESS = 0X09) .................................................................. 31

2.2 THE TRANSMIT CLOCK DUTY CYCLE ADJUST CIRCUITRY ................................................................. 31

2.3 THE HDB3/B3ZS ENCODER BLOCK ............................................................................................... 32

B3ZS Encoding ........................................................................................................................... 32

HDB3 Encoding ........................................................................................................................... 32

Disabling the "HDB3/B3ZS" Encoder .......................................................................................... 33

COMMAND REGISTER, CR2 (ADDRESS = 0X02) ............................................................ 33

COMMAND REGISTER, CR10 (ADDRESS = 0X0A) ......................................................... 33

2.4 THE TRANSMIT PULSE SHAPING CIRCUITRY .................................................................................... 33

Enabling the Transmit Line Build-Out Circuit .............................................................................. 35

COMMAND REGISTER, CR1 (ADDRESS = 0X01) ............................................................ 35

Disabling the Transmit Line Build-Out Circuit ............................................................................. 36

I

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