XRT7302IQ80 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT7302IQ80' PDF : 77 Pages View PDF
XRT7302 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
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REV. 1.1.0
LIST OF TABLES
Table 1:Role of Microprocessor Serial Interface pins when the XRT7302 device is operating in the "Hardware"
Mode ............................................................................................................................................................... 26
Table 2:Selecting the Data Rate for Channel 1, (within the XRT7302 Device), via the "E3_Ch1" and "STS-1/
DS3_Ch1" input pins (Hardware Mode) .......................................................................................................... 28
Table 3:Selecting the Data Rate for Channel 1 (within the XRT7302 device); via the "STS-1/DS3_Ch1" and the
"E3_Ch1" bit-fields, within Command Register CR4 (Host Mode) .................................................................. 28
Table 4:Selecting the Data Rate for Channel 2 (within the XRT7302 Device) via the "E3_Ch2" and "STS-1/
DS3_Ch2" input pins (Hardware Mode) .......................................................................................................... 28
Table 5:Selecting the Data Rate for Channel 2 (within the XRT7302 Device) via the "E3_Ch2" and "STS-1/
DS3_Ch2" Bit Fields, within Command Register CR4 (Host Mode) ............................................................... 29
Table 6:The ALOS (Analog LOS) Declaration and Clearance Thresholds for a given setting of LOSTHR and
REQEN (DS3 and STS-1 Applications) .......................................................................................................... 45
Table 7:The Relationship Between the “TxOFF” Input Pin, the “TxOFF” Bit Field and the State of the Transmitter
57
Table 8:Addresses and Bit Formats of XRT7302 Command Registers .......................................................... 60
Table 9:Contents of "LLB1" and "RLB1" and the Corresponding Loop-Back Mode for Channel 1 ................. 64
Table 10:Contents of "LLB2" and "RLB2" and the Corresponding Loop-Back Mode for Channel 2 ............... 67
VI
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