XRT84L38 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT84L38' PDF : 453 Pages View PDF
REV. 1.0.1
XRT84L38
OCTAL T1/E1/J1 FRAMER
LIU CONTROL
(Framer Channel Number indicated by _n)
SIGNAL NAME
LOS_0
LOS_1
LOS_2
LOS_3
LOS_4
LOS_5
LOS_6
LOS_7
PIN #
G4
J4
K1
M2
V2
AA1
AB3
AF1
TYPE
DESCRIPTION
I Loss of Signal Input—LIU Interface-Framer_n:
This input pin is intended to be connected to the RxLOS output pin of the LIU
associated with Framer_n. If the LIU IC detects an LOS condition and asserts
(toggles "High") this input pin, then the Receive Framer associated with
Channel_n will declare a LOS condition.
Asserting this input pin "High" will result in Framer_n asserting the RxLOS_n
output pin.
GPO7
CS1
P1
O General Purpose Output pin/Chip Select Output pin:
The exact role of this output pin depends upon whether the LIU Controller block
is operating in the Hardware or HOST Mode.
Hardware Mode: GPO7
This pin is a general purpose output pin that is controlled by the contents of bit-
field 7, within the Line Control Register (Address = 00h, 02h).
HOST Mode:CS1
This pin is a chip select output pin that is asserted (toggles “Low”) following a
write operation to the LIU Access Register 1, associated with framer 4, 5, 6 and
7. This output pin is intended to be tied to the chip select input of an LIU (or
other peripheral device) that is configurable via a Microprocessor Serial Inter-
face. Once the HOST Mode serial port has completed its read or write opera-
tion, then it will negate (toggle "High") this output pin.
GPO6
SClk1
GPO5
SDI1
P2
O General Purpose Output pin/Serial Clock Output:
The exact role of this output pin depends upon whether the LIU Controller block
is operating in the Hardware or HOST Mode.
Hardware Mode: GPO6
This pin is a general purpose output pin that is controlled by the contents of bit-
field 6, within the Line Control Register (Address = 00h, 02h).
HOST Mode:SClk1
This pin functions as the Serial Clock output signal (SCLK), when the LIU Con-
troller Block is configured to operate in the HOST Mode
P4
O General Purpose Output pin/Serial Data Input bit 1:
The exact role of this output pin depends upon whether the LIU Controller block
is operating in the Hardware or HOST Mode.
Hardware Mode: GPO5
This pin is a general purpose output pin that is controlled by the contents of bit-
field 5, within the Line Control Register (Address = 00h, 02h).
HOST Mode:SDI1
This pin functions as the Serial Data Input (SDI) output pin (to the Microproces-
sor Serial Interface).
GPO4
SDO1
R1
O General Purpose Output pin/Serial Data Output bit 0:
The exact role of this output pin depends upon whether the LIU Controller block
is operating in the Hardware or HOST Mode.
Hardware Mode: GPO4
This pin is a general purpose output pin that is controlled by the contents of bit-
field 4, within the Line Control Register (Address = 00h, 02h).
HOST Mode:SDO1
This pin functions as the Serial Data Output (SDO) input pin (into the LIU Con-
troller Block).
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