XRT84L38 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT84L38' PDF : 453 Pages View PDF
XRT84L38
OCTAL T1/E1/J1 FRAMER
MICROPROCESSOR INTERFACE
(Framer Channel Number indicated by _n)
REV. 1.0.1
SIGNAL NAME
μPType0
PIN #
T25
TYPE
DESCRIPTION
I Microprocessor Type Input: Bit 0 (LSB):
This input pin, along with μPTYPE1 and μPTYPE2 permit the user to specify
which type of Microprocessor/Microcontroller to be interfaced the Framer.
μPType1
P24
μPType2
M25
Microprocessor Type Input: Bit 1
Microprocessor Type Input: Bit 2
MICROPROCESSOR
TYPE
000
001
010
011
100
101
68HC11, 8051, 80C188
MOTOROLA 68K
INTEL X86
INTEL I960
IDT3051/52
IBM POWER PC 403
RDY_DTACK
A0
A1
A2
A3
A4
A5
A6
DBEn
ALE_AS
CS
RD
P23
P26
N23
M26
L26
L23
J26
K23
P25
N24
G25
R26
O Ready/Data Transfer Acknowledge Output:
The exact behavior of this pin depends upon which Microprocessor the Framer
is configured to interface to:
Intel Type Microprocessors
This output pin toggles "Low" when the Framer is ready to respond to the current
PIO (Programmed I/O) or Burst Transaction.
Motorola Type Microprocessors
This output pin toggles "Low" when the Framer has completed the current bus
cycle.
I Microprocessor Interface Address Bus Input Bit 0 -- (LSB)
Microprocessor Interface Address Bus Input Bit 1
Microprocessor Interface Address Bus Input Bit 2
Microprocessor Interface Address Bus Input Bit 3
Microprocessor Interface Address Bus Input Bit 4
Microprocessor Interface Address Bus Input Bit 5
Microprocessor Interface Address Bus Input Bit 6 -- (MSB)
I Data Bus Enable Input pin.
I Address Latch Enable Input_Address Strobe
I Microprocessor Interface—Chip Select Input:
The Microprocessor/Microcontroller must assert this input pin (toggle it "Low") in
order to exchange data with the Framer.
Note: For the 68K MPU, this signal is generated by address decode and address
strobe.
I Microprocessor Interface—Read Strobe Input:
The exact behavior of this pin depends upon the type of Microprocessor/Micro-
controller the Framer has been configured to interface to, as defined by the
μPTYPE[2:0] pins.
Note: See pin T25 (µPType0) for the µP selection table.
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