Numonyx™ StrataFlash® Wireless Memory (L18)
Figure 12: Asynchronous Single-Word Read with ADV# Latch
Address [A]
R1
R2
A[1:0][A]
ADV#
CE# [E}
OE# [G]
WAIT [T ]
Data [D/Q]
R101
R105
R106
R3
R4
R15
R7
R6
Note: WAIT shown deasserted during asynchronous read mode (RCR[10]=0 Wait asserted low).
Figure 13: Asynchronous Page-Mode Read Timing
R1
R2
A[Max:2] [A]
A[1:0]
ADV#
CE# [E]
OE# [G]
WAIT [T]
DATA [D/Q]
R101
R105
R106
R3
R4
R15
R7
R108
Note: WAIT shown deasserted during asynchronous read mode (RCR[10]=0 Wait asserted low).
R8
R9
R17
R10
R8
R10
R17
R9
Datasheet
32
November 2007
251902-12