ADSP-21477 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-21477' PDF : 76 Pages View PDF
ADSP-21477/ADSP-21478/ADSP-21479
Core Timer
The following timing specification applies to FLAG3 when it is
configured as the core timer (TMREXP).
Table 24. Core Timer
Parameter
Switching Characteristic
tWCTIM
TMREXP Pulse Width
88-Lead LFCSP Package
All Other Packages
Min
Max
Min
Max
Unit
4 × tPCLK – 1.55
4 × tPCLK – 1.2
ns
FLAG3
(TMREXP)
tWCTIM
Figure 12. Core Timer
Timer PWM_OUT Cycle Timing
The following timing specification applies to timer0 and timer1
in PWM_OUT (pulse-width modulation) mode. Timer signals
are routed to the DPI_P14–1 pins through the DPI SRU. There-
fore, the timing specifications provided below are valid at the
DPI_P14–1 pins.
Table 25. Timer PWM_OUT Timing
Parameter
Switching Characteristic
tPWMO
Timer Pulse Width Output
88-Lead LFCSP Package
All Other Packages
Min
Max
Min
Max
Unit
2 × tPCLK – 1.65
2 × (231 – 1) × tPCLK 2 × tPCLK – 1.2
2 × (231 – 1) × tPCLK ns
PWM
OUTPUTS
tPWMO
Figure 13. Timer PWM_OUT Timing
Rev. C | Page 31 of 76 | July 2013
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