AS4LC8M8S0-8FTC View Datasheet(PDF) - Alliance Semiconductor
Part Name
Description
MFG CO.
'AS4LC8M8S0-8FTC' PDF : 24 Pages View PDF
AS4LC4M16S0
AS4LC16M4S0
®
(D) WR-P Interrupted by WR in another bank (CL = 3, BL = 4)
CLK
CMD
WRP
(A)
WR
(B)
DQ
DA0
DA1
DA2
DB0
DB1
DB2
DB3
Bank A Precharge Starts *
* The row active command of the precharged bank can be issued after tRP from this point.
Clock suspension read waveforms
CLK external
CLK internal
CKE
DQM
DQ Q1
Q2
Q3
Q4
OPEN
OPEN
Q6
(BL = 8)
CLK external
CLK internal
CKE
DQM
DQ Q1
Q2
Q3
Q4
Q6
OPEN
CLK external
CLK internal
CKE
DQM
DQ Q1
Q2
Q3
Q4
Q5
Q6
14
ALLIANCE SEMICONDUCTOR
7/5/00
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