AS4LC8M8S0-8FTC View Datasheet(PDF) - Alliance Semiconductor

Part Name

Description

MFG CO.

AS4LC8M8S0-8FTC

3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

Alliance Semiconductor 

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AS4LC8M8S0

AS4LC4M16S0

®

Power down mode waveform

CLK

CS

RAS

CAS

WE

BA0/BA1

A10

RAa

A0–A9,A11

RAa

CAa

DQM

RAa

RAa

CAx

CKE

DQ

Bank activate

Active standby

NOP

Power down mode

Power down mode entry

Power down mode exit

Power down mode entry

Precharge standby

Power down mode

Enter power down mode by pulling CKE low.

All input/output buffers (except CKE buffer are turned off in power down mode.

When CKE goes high, command input must be equal to no operation at next CLK rising edge.

NOP Bank activate

Power down mode exit

Read/write waveform

CLK

CS

RAS

CAS

WE

BA0/BA1

A10

A0-A9,A11

DQM

tRP

RAa

RAa

CAa

CKE

DQ

Bank activate

Read

(BL = 8, CL = 3)

tRAS

tRP

RAb

CAb

RAb

Aa0 Aa1 Aa2 Aa3 Aa4 Aa5

QQQ QQQ

tRP

Ab0 Ab1 Ab2 Ab3 Ab4 Ab5

DDD DDD

Write

Precharge

Bank activate

7/5/00

ALLIANCE SEMICONDUCTOR

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