5.5 AVR Atmel ATA6612C/ATA6613C Memories
This section describes the different memories in the Atmel® ATA6612C/ATA6613C. The AVR® architecture has two main
memory spaces, the data memory and the program memory space. In addition, the Atmel ATA6612C/ATA6613C features
an EEPROM memory for data storage. All three memory spaces are linear and regular.
5.5.1
In-System Reprogrammable Flash Program Memory
The Atmel ATA6612C/ATA6613C contains 8/16Kbytes on-chip in-system reprogrammable flash memory for program
storage. Since all AVR instructions are 16 or 32 bits wide, the flash is organized as 2/4/8K × 16. For software security, the
flash program memory space is divided into two sections, boot loader section and application program section in Atmel
ATA6612C and ATA6613C. See SELFPRGEN description in section Section 5.23.5.1 “Store Program Memory Control and
Status Register – SPMCSR” on page 244 for more details.
The flash memory has an endurance of at least 75,000 write/erase cycles. The Atmel ATA6612C/ATA6613C program
counter (PC) is 11/12/13 bits wide, thus addressing the 2/4/8K program memory locations. The operation of boot program
section and associated boot lock bits for software protection are described in detail in Section 5.23 “Boot Loader Support –
Read-While-Write Self-Programming, Atmel ATA6612C and ATA6613C” on page 240. Section 5.24 “Memory Programming”
on page 253 contains a detailed description on flash programming in SPI- or parallel programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM – load program memory
instruction description).
Timing diagrams for instruction fetch and execution are presented in Section 5.4.7 “Instruction Execution Timing” on page
36.
Figure 5-7. Program Memory Map, Atmel ATA6612C/ATA6613C
Program Memory
0x0000
Application Flash Section
0x7FF
38 ATA6612C/ATA6613C [DATASHEET]
9111L–AUTO–11/14