Figure 5-8. Program Memory Map, Atmel ATA6612C/ATA6613C
Program Memory
0x0000
Application Flash Section
Boot Flash Section
0x0FFF/0x1FFF
5.5.2
SRAM Data Memory
Figure 5-9 shows how the Atmel® ATA6612C/ATA6613C SRAM memory is organized.
The Atmel ATA6612C/ATA6613C is a complex microcontroller with more peripheral units than can be supported within the
64 locations reserved in the opcode for the IN and OUT instructions. For the extended I/O space from 0x60 - 0xFF in SRAM,
only the ST/STS/STD and LD/LDS/LDD instructions can be used.
The lower 768/1280/1280 data memory locations address both the register file, the I/O memory, extended I/O memory, and
the internal data SRAM. The first 32 locations address the register file, the next 64 location the standard I/O memory, then
160 locations of extended I/O memory, and the next 512/1024/1024 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, indirect with displacement, indirect, indirect with
pre-decrement, and indirect with post-increment. In the register file, registers R26 to R31 feature the indirect addressing
pointer registers.
The direct addressing reaches the entire data space.
The indirect with displacement mode reaches 63 address locations from the base address given by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-increment, the address registers X,
Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O registers, 160 extended I/O registers, and the 512/1024/1024 bytes of
internal data SRAM in the Atmel ATA6612C/ATA6613C are all accessible through all these addressing modes. The register
file is described in Section 5.4.5 “General Purpose Register File” on page 34.
Figure 5-9. Data Memory Map
Data Memory
32 Registers
64 I/O Registers
160 Ext I/O Registers
0x0000 - 0x001F
0x0020 - 0x005F
0x0060 - 0x00FF
0x0100
Internal SRAM
(512/1024/1024 x 8)
0x02FF/0x04FF/0x04FF
ATA6612C/ATA6613C [DATASHEET]
39
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