ATSAMA5D41A-CU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATSAMA5D41A-CU' PDF : 1808 Pages View PDF
Table 15-1. List of H64MX Masters
Master No.
Name
0
Bridge from AXI matrix (Core)
1, 2
DMA Controller 0
3, 4
DMA Controller 1
5, 6
LCDC DMA
7
Video Decoder DMA
8
ISI DMA
9
Bridge from H32MX to H64MX
15.3.2 Matrix Slaves
The H64MX manages 13 slaves. Each slave has its own arbitrator providing a dedicated arbitration per slave.
Table 15-2. List of H64MX Slaves
Slave No. Description
TZ Access Management
0
Bridge from H64MX to AXIMX (Internal ROM,
Crypto Library, PKCC RAM)
Always Secured
1
H64MX Peripheral Bridge
–
2
Video Decoder
Programmable Secure(1)
3
DDR2 Port0 - AESB
Scalable Secure
4
DDR2 Port1
Scalable Secure
5
DDR2 Port2
Scalable Secure
6
DDR2 Port3
Scalable Secure
7
DDR2 Port4
Scalable Secure
8
DDR2 Port5
Scalable Secure
9
DDR2 Port6
Scalable Secure
10
DDR2 Port7
Scalable Secure
11
Internal SRAM 128K
Internal Secure
12
Bridge from H64MX to H32MX
–
Notes: 1. This AHB slave is programmed like APB slave in the MATRIX_SPSELRx.
15.3.3 Master to Slave Access
Table 15-3 gives the interconnect between all the masters and slaves. Writing in a register or field not dedicated to a mas-
ter or a slave will have no effect.
SAMA5D4 Series [DATASHEET]
Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16
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